1. Field of the Invention
This invention relates to a ferroelectric memory device, more specifically a memory device using a metal-ferroelectric-metal-isolator-silicon-field effect transistor (hereinafter referred to as MFMIS-FET) as a ferroelectric memory element.
2. Description of the Related Art
A ferroelectric memory device using the MFMIS-FET is known to the public. Japanese laid-open publications No. Hei 8-36891, Hei 7-249288 and Hei 8-8408 and other publications disclose such ferroelectric memory device. FIG. 9A shows a schematic symbol of the ferroelectric memory element used for the ferroelectric memory device.
A voltage is applied between a control gate electrode CG and a memory gate electrode MG in order to store data in the ferroelectric memory element. By applying the voltage, a ferroelectrics FE is tuned into a polarization state in accordance with the applied voltage. The polarization state at the ferroelectrics FE is maintained even when a power source is turned off. Two different polarization states such as positive polarization state or negative polarization state can be obtained by switching polarity of the voltage. For instance, the ferroelectrics FE is polarized so as to make a region confronted with the control gate electrode CG in the negative polarization state when a voltage lower than a voltage applied to the control gate electrode CG is applied to the memory gate electrode MG (this condition is hereinafter referred to as a first storing condition). On the contrary, the ferroelectrics FE is polarized so as to make the region confronted with the control gate electrode CG in the positive polarization state when a voltage higher than a voltage applied to the control gate electrode CG is applied to the memory gate electrode MG (this condition is hereinafter referred to as second storing condition). Thus, two different polarization states (data) can be stored a under nonvolatile condition by the ferroelectric memory element.
Read-out of the data thus stored is carried out by detecting a drain current I.sub.D when a reference voltage V.sub.ref (a threshold voltage of the ferroelectric memory element when the ferroelectrics FE does not cause spontaneous polarization) is applied to the control gate electrode CG with opening the memory gate electrode MG as well as grounding a source electrode S. FIG. 9B shows a relationship between a voltage V.sub.CG applied to the control gate electrode CG and the drain current I.sub.D. In FIG. 9B, the relationship between the voltage V.sub.CG and the drain current I.sub.D at the first storing condition is illustrated as a curve "(a)". Also, another relationship between the voltage V.sub.CG and the drain current I.sub.D is shown as a curve "b" when no polarization is observed at the ferroelectrics FE, and the relationship between the voltage V.sub.CG and the drain current I.sub.D at the second storing condition is illustrated as a curve "C" respectively.
The drain current I.sub.D is equivalent to a current I.sub.S when no polarization is observed at the ferroelectrics FE in case of applying the reference voltage V.sub.ref to the control gate electrode CG. The drain current I.sub.D is equivalent to a current I.sub.1 when the ferroelectrics FE is in the first storing condition. Further, the drain current I.sub.D is equivalent to a current I.sub.2 when the ferroelectrics FE is in the second storing condition. In this way, judgement of the stored data can be carried out by judging whether or not the drain current I.sub.D has a larger value than that of the current I.sub.S when the reference voltage V.sub.ref is applied to the control gate electrode CG.
Thus, an nonvolatile memory element can be made by using just one transistor when using the MFMIS-FET as the ferroelectric memory element. Further, it is not necessary for the ferroelectric memory device to carry out rewrite operation because the stored data is unchanged during read out operation (no turn-over of polarization is done). So that, a circuit for carrying out rewrite operation is not needed, and the number of the read-out operations is unlimited because the ferroelectrics FE does not reach its limit of endurance. In other words, it is possible to make an nonvolatile memory device which has a high integration and capable of carrying out the read-out operation unlimitedly.
However, the conventional ferroelectric memory device described in above has the following problems to be resolved. The conventional ferroelectric memory device is made so as to apply the reference voltage V.sub.ref to the control gate electrode CG during the read-out operation as shown in FIG. 9B. So that, it is necessary to provide a circuit for supplying the reference voltage V.sub.ref accurately to the ferroelectric memory device in order to maintain the voltage applied to the ferroelectrics FE under a settled value. Therefore, integration of the nonvolatile memory device is decreased because structure of the circuit for supplying the reference voltage V.sub.ref is complex.
In addition, the voltages applied to the control gate electrode CG become unstable conditions when the power source is switched to ON and OFF even when the circuit for supplying the reference voltage V.sub.ref is provided. So that, polarization state of the ferroelectrics FE is changed unexpectedly. In other words, the stored data in the ferroelectrics FE can possibly be erased by repeated switching of the power source.